1. general description the 74LVC1G07-Q100 provides the non-inverting buffer. the output of this device is an open drai n and can be connected to other open-drain outputs to implement active-low wired- or or active-high wired-and functions. inputs can be driven from either 3.3 v or 5 v dev ices. this feature allows the use of this device in a mixed 3.3 v and 5 v environment. schmitt-trigger action at all inputs makes the ci rcuit tolerant for slower input rise and fall time. this device is fully specified for pa rtial power-down ap plications using i off . the i off circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? wide supply voltage range from 1.65 v to 5.5 v ? 5 v tolerant input/ output for interfacing with 5 v logic ? high noise immunity ? complies with jedec standard: ? jesd8-7 (1.65 v to 1.95 v) ? jesd8-5 (2.3 v to 2.7 v) ? jesd8-b/jesd36 (2.7 v to 3.6 v) ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? ? 24 ma output drive (v cc =3.0v) ? cmos low power consumption ? latch-up performance exceeds 250 ma ? direct interface with ttl levels ? inputs accept voltages up to 5 v ? multiple package options 74LVC1G07-Q100 buffer with open-drain output rev. 1 ? 23 may 2013 product data sheet
74lvc1g07_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 23 may 2013 2 of 13 nxp semiconductors 74LVC1G07-Q100 buffer with open-drain output 3. ordering information 4. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. functional diagram 6. pinning information 6.1 pinning table 1. ordering information type number package temperature range name description version 74lvc1g07gw-q100 ? 40 ? c to +125 ? c tssop5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm sot353-1 74lvc1g07gv-q100 ? 40 ? c to +125 ? c sc-74a plastic surface-mounted package; 5 leads sot753 table 2. marking type number marking code [1] 74lvc1g07gw-q100 vs 74lvc1g07gv-q100 v07 fig 1. logic symbol fig 2. iec logic symbol fig 3. logic diagram mna623 ay 2 4 mna624 4 2 a y mna591 y a gnd fig 4. pin configuration sot353-1 and sot753 / 9 & |